In electronic circuits, in particular in digital circuits, it is known to manage access to shared components of the circuit with the aid of the so-called master/slave principle. It is thus possible for a master, for example a microprocessor, to be connected via a bus system to one or to two slaves, for example to two electronic output stages. The master sends a clock signal, a master data signal, and a select signal. With the select signal, one of the two slaves is selected as receiver. That slave receives the data signal according to the time cycle of the clock signal. The slave can furthermore send back a slave data signal to the master according to the time cycle of the received clock signal.
Since only the master can deliver the select signal and the clock signal, it is at a higher level than the two slaves. A slave can transmit a data signal to the master only if the master has previously selected it with the select signal. Access to the shared component, i.e. for example to the bus system that connects the master and the slaves, is thus managed by the master.
In electronic control devices, for example in the motor vehicle sector, it is often necessary for safety reasons to embody a microprocessor in doubled fashion, i.e. to provide a so-called backup processor. In this case both microprocessors must be operable as master, and both masters must be connectable via the bus system to the slaves. The first requirement means that the microprocessors must possess a so-called “multi-master” capability, which is usually associated with increased complexity. The second requirement entails the problem that both microprocessors, for example, deliver a clock signal, so that, for example, the clock signal generated by the first microprocessor is also applied, inter alia, to the signal output at which the second microprocessor is delivering its clock signal. This can result in damage to or destruction of electronic components of that signal output.